vol steps 0..256
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@@ -26,9 +26,15 @@
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/*
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* I2S DAC
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*/
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/*
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#define I2S_DOUT 27 // DIN connection
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#define I2S_BCLK 26 // BCLK Bit clock
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#define I2S_LRC 25 // WSEL Left Right Clock
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/*/
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#define I2S_DOUT 22 // DIN connection
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#define I2S_BCLK 26 // BCLK Bit clock
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#define I2S_LRC 25 // WSEL Left Right Clock
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//*/
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/*
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* ENCODER
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*/
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