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252 lines
5.7 KiB
Markdown
252 lines
5.7 KiB
Markdown
# 6502 CPU Emulation Specification
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A technical Markdown specification for **emulating the MOS Technology 6502 CPU family**, suitable for software emulators, educational tools, testing frameworks, and retrocomputing projects.
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---
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## 1. Scope
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This specification describes the functional requirements for emulating:
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* MOS 6502
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* WDC 65C02 (where noted)
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Out of scope:
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* Cycle-exact analog behavior
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* Physical bus contention
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* Undocumented silicon defects (unless explicitly implemented)
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---
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## 2. CPU Overview
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### Core Characteristics
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| Feature | Value |
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| ------------- | ------------- |
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| Data width | 8-bit |
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| Address width | 16-bit |
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| Address space | 64 KB |
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| Endianness | Little-endian |
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| Clock | Single-phase |
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---
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## 3. Registers
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| Register | Size | Description |
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| -------- | ------ | -------------------------- |
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| A | 8-bit | Accumulator |
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| X | 8-bit | Index register |
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| Y | 8-bit | Index register |
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| SP | 8-bit | Stack pointer (page $01xx) |
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| PC | 16-bit | Program counter |
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| P | 8-bit | Processor status flags |
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### Status Flags (P)
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| Bit | Name | Meaning |
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| --- | ---- | ----------------------------- |
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| 7 | N | Negative |
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| 6 | V | Overflow |
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| 5 | - | Unused (always 1 when pushed) |
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| 4 | B | Break |
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| 3 | D | Decimal |
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| 2 | I | IRQ disable |
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| 1 | Z | Zero |
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| 0 | C | Carry |
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---
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## 4. Memory Model
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### Addressing
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* 16-bit address bus (`$0000-$FFFF`)
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* Byte-addressable
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### Required Emulator Interfaces
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```text
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read(address) -> byte
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write(address, byte)
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```
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### Stack Behavior
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* Stack base: `$0100`
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* Push: `write($0100 + SP, value); SP--`
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* Pull: `SP++; value = read($0100 + SP)`
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---
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## 5. Reset and Interrupt Handling
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### Reset Sequence
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1. Set `I = 1`
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2. Set `SP = $FD`
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3. Clear `D`
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4. Load `PC` from `$FFFC-$FFFD`
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### Interrupt Vectors
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| Interrupt | Vector Address |
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| --------- | -------------- |
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| NMI | `$FFFA-$FFFB` |
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| RESET | `$FFFC-$FFFD` |
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| IRQ/BRK | `$FFFE-$FFFF` |
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---
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## 6. Instruction Fetch-Decode-Execute Cycle
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### Execution Loop (Conceptual)
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```text
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opcode = read(PC++)
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decode opcode
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fetch operands
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execute instruction
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update flags
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increment cycles
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```
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---
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## 7. Addressing Modes
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| Mode | Example | Notes |
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| ---------------- | ------------- | --------------------- |
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| Immediate | `LDA #$10` | Constant |
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| Zero Page | `LDA $20` | Wraps at $00FF |
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| Absolute | `LDA $2000` | Full address |
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| Indexed | `LDA $2000,X` | Optional page penalty |
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| Indirect | `JMP ($FFFC)` | Page wrap bug |
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| Indexed Indirect | `LDA ($20,X)` | ZP indexed |
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| Indirect Indexed | `LDA ($20),Y` | ZP pointer |
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---
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## 8. Instruction Set Requirements
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### Categories
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* Load/Store
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* Arithmetic (ADC, SBC)
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* Logic (AND, ORA, EOR)
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* Shifts & Rotates
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* Branches
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* Stack operations
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* System control
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### Decimal Mode (NMOS 6502)
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* Applies to `ADC` and `SBC`
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* Uses BCD arithmetic when `D = 1`
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---
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## 9. Flags Behavior Rules
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| Instruction Type | Flags Affected |
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| ---------------- | -------------- |
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| Loads | N, Z |
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| ADC/SBC | N, V, Z, C |
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| CMP/CPX/CPY | N, Z, C |
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| INC/DEC | N, Z |
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| Shifts | N, Z, C |
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---
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## 10. Cycle Counting
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### Cycle Accuracy Levels
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| Level | Description |
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| -------------------- | -------------------- |
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| Functional | Correct results only |
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| Instruction-accurate | Fixed cycle counts |
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| Cycle-accurate | Page-cross penalties |
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### Page Boundary Penalties
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* Branch taken: +1 cycle
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* Branch crosses page: +2 cycles
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* Indexed load crosses page: +1 cycle
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---
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## 11. Known Hardware Quirks (NMOS 6502)
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| Quirk | Description |
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| ---------------- | ------------------------------- |
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| JMP indirect bug | High byte wrap at page boundary |
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| BRK sets B flag | Only when pushed |
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| Unused flag bit | Always reads as 1 |
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---
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## 12. Illegal / Undocumented Opcodes (Optional)
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* Many opcodes perform composite operations
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* Behavior varies by silicon revision
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* Should be disabled or explicitly enabled
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---
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## 13. Timing and Clocking
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* One instruction executed per multiple clock cycles
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* Emulator may execute instructions per host tick
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* Cycle counter required for I/O timing
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---
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## 14. Integration with Peripherals
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### Memory-Mapped I/O
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```text
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if address in IO range:
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delegate to device
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```
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Examples:
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* 6522 VIA
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* UART
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* Video hardware
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---
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## 15. Testing and Validation
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### Recommended Test ROMs
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* Klaus Dormann 6502 functional tests
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* Interrupt and decimal mode tests
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### Validation Checklist
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* All instructions execute correctly
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* Flags match reference behavior
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* Vectors handled properly
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* Stack operations correct
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---
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## 16. Reference Links
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* [https://www.masswerk.at/6502/6502_instruction_set.html](https://www.masswerk.at/6502/6502_instruction_set.html)
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* [https://www.nesdev.org/wiki/6502](https://www.nesdev.org/wiki/6502)
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* [https://github.com/Klaus2m5/6502_65C02_functional_tests](https://github.com/Klaus2m5/6502_65C02_functional_tests)
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* [https://en.wikipedia.org/wiki/MOS_Technology_6502](https://en.wikipedia.org/wiki/MOS_Technology_6502)
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---
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**Document Scope:** Software emulation of the 6502 CPU
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**Audience:** Emulator developers, retrocomputing engineers
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**Status:** Stable technical reference
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